As the demand for silicon carbide (SiC) increases, particularly driven by the rising use of electric vehicles (EVs) and power conversion applications, attention has shifted to the supply side. The traditional crystal growth method for SiC involves slow and expensive sublimation-based processes, posing numerous challenges. While most SiC manufacturing currently utilizes 150 mm wafers, the industry is gradually transitioning to 200 mm wafer sizes, leading to potential cost reductions in the long run. This article explores another potential method for cost reduction in SiC processing: plasma polishing as an alternative or complementary process to traditional chemical-mechanical polishing (CMP).
Pre-epi Surface Preparation
After crystal growth, SiC typically undergoes slicing and grinding to create substrates. However, the hardness of SiC makes this process complex. Advanced laser-based slicing techniques have emerged to minimize kerf losses compared to the use of multi-wire saws and diamond slurry. Nevertheless, the resulting substrates may still possess surface and sub-surface defects that need to be eliminated. This step is crucial to minimize defects during the subsequent epi growth, which constitutes a significant portion of the device's semiconductor section. To improve the pre-epi surface quality, chemical-mechanical polishing (CMP) is commonly employed.
Plasma Polish as The Alternative to CMP
Oxford Instruments Plasma Technology, based near Bristol, UK, has developed a patented process called Plasma Polish Dry Etch (PPDE) for SiC wafers. This contactless dry etch process is designed to enhance crystal quality, reduce wet cleans and polishes, and streamline SiC device fabrication. Utilizing proprietary chemistry and power/pressure conditions, Plasma Polish effectively removes defective and weakly bonded material from the surface and sub-surface of SiC wafers. The resulting defect-free surface is highly suitable for subsequent high-quality epi-deposition or other processes, offering a significantly lower environmental impact compared to CMP.
Plasma Polish has several advantages over CMP. Firstly, it effectively removes sub-surface defects, which CMP may struggle to eliminate efficiently. This improvement in defect removal can enhance yield and reduce the die's cost. Additionally, CMP, with its mechanical component, is prone to wafer breakage and scratching, potentially leading to complications in subsequent fabrication steps. Plasma Polish offers a lower cost of ownership compared to CMP, as it eliminates the need for large amounts of water, slurry, and costly effluent disposal. It can also be easily scaled to larger wafer sizes, providing flexibility and cost benefits. Plasma Polish is estimated to have a reduced environmental footprint compared to CMP, which relies on significant water consumption and toxic chemical effluent disposal.
Tests and Results
Tests conducted using Plasma Polish demonstrated positive results. Atomic Force Microscope (AFM) measurements showed a 50% improvement in surface roughness (Ra) post-Plasma Polish. Following epi growth, optical defect maps revealed lower counts of killer defects such as micropits and scratches with Plasma Polish, leading to a higher total usable area (TUA) on the wafer (94% compared to 84% with CMP). Yield comparisons on PIN diodes and 1200 V MOSFETs between Plasma Polish and CMP-processed wafers showed similar results, indicating the comparable performance of both processes.
As the demand for SiC devices continues to rise, addressing production capacity and reducing die costs are crucial challenges. Oxford Instruments' Plasma Polish process shows promise as part of a comprehensive solution to these challenges. The company has made significant progress in qualifying Plasma Polish on customer substrates, resulting in improvements throughout the manufacturing process. With market interest on the rise, Oxford Instruments aims to increase production capacity to meet growing demand in the SiC industry.
