The anticipated progression to 2nm process technologies is foreseen to significantly escalate the costs associated with manufacturing leading-edge chips. Analysts from International Business Strategies project that chip costs could spike by approximately 50% when transitioning from 3nm to 2nm processors, potentially resulting in a $30,000 price per wafer for 2nm chips. This estimation is founded on the necessity for increasingly sophisticated wafer fab tools, particularly an expanded number of EUV lithography tools, to sustain a 50,000 wafer starts per month (WSPM) capacity for 2nm-class technology.
IBS estimates the expenditure for establishing a 2nm-capable fab with a monthly capacity of around 50,000 WSPM could reach approximately $28 billion, marking a substantial increase from the $20 billion associated with a 3nm fab of similar capacity. This surge in cost is attributed to the heightened requirement for EUV lithography tools. These elevated production costs per wafer and per chip are poised to impact companies utilizing cutting-edge fabrication technologies, such as Apple, which currently leads in mass-producing processors for smartphones and PCs using TSMC's N3B (3nm-class fabrication process).
Looking forward, IBS also predicts a tangible increase in cost for processing a single 300mm wafer using TSMC's N2 fabrication process, estimated to rise to around $30,000 compared to approximately $20,000 for an N3-based wafer. This cost escalation is expected to extend to a similar margin increase in per-chip cost. However, there are diverging estimates regarding the per-chip cost, with IBS suggesting a substantial rise to around $85 for a 2nm 'Apple chip' as compared to the current $50 estimation. This might imply lower yields, despite the rough nature of these estimates.
In contrast, another projection earlier this year indicated a lower estimated cost of $25,000 per 2nm wafer at TSMC's fabs, highlighting the significant variability in such forecasts. Nevertheless, it is apparent that chips manufactured using a 2nm process will likely be pricier than those produced on a 3nm-class process technology. This expected cost disparity could prompt companies like AMD and Intel to hasten the adoption of multi-chipset designs composed of chiplets made on different nodes, potentially mitigating the expenses linked with leading-edge nodes. On the other hand, smartphone processors are anticipated to retain monolithic designs due to the ongoing high costs associated with advanced packaging.
