Belgian research center Imec is collaborating with leading companies in lithography, providing insights into the future of the semiconductor industry. Imec's CEO, Luc Van den Hove, predicts that chip manufacturers will master the A2 process technology by 2037, enabling the industry to surpass the 0.1 nm limit by 2040.
The A2 process corresponds to a lithographic standard of 0.2 nm (20 angstroms), suggesting a significant technological advancement ahead. Starting next year, the sector will shift to producing 2-nm chips, transitioning to a Nanosheet transistor structure. By 2027, the industry is expected to adopt the A7 process technology, which will introduce the CFET transistor structure. The transition to A14 technology will require high numerical aperture (High-NA EUV) equipment, making this migration essential for companies like TSMC. However, TSMC has indicated that it does not plan to use such equipment for its A16 technology, aiming to master it in the latter half of 2026.
Ultimately, the timeline suggests that by 2037, the industry will achieve mastery of 0.2 nm (A2) technology, with a long-term goal of reaching the 0.1 nm (A1) benchmark by 2040, though the latter milestone remains speculative.
