GOWIN Semiconductor, an embedded hardware specialist, has recently announced the expansion of its Arora field-programmable gate array (FPGA) range with new models. This release strengthens the Arora V family and brings significant improvements compared to its earlier Arora GW2A series.
The new Arora V FPGA chips offer a 30 percent boost in performance and a 60 percent reduction in power consumption. Scott Casper from GOWIN Semiconductor expressed excitement about providing these latest 22nm technology products for next-generation applications during the company's phase of growth and innovation.
One distinguishing feature of the Arora V chips is the inclusion of EasyCDR. This feature simplifies the process of receiving data on an FPGA's general-purpose input/output (GPIO) pins by automatically converting serial data into parallel data. It eliminates the need to set a sampling clock and supports all signals with a data rate below 1Gb/s.
The Arora V chips, manufactured using a 22nm process node, come equipped with various features, including 12.5Gb/s high-speed SERDES interfaces, a hard-core PCI Express (PCIe) interface, hard-core MIPI D-phy and C-phy support, DDR3 memory interfaces, and an on-board microprocessor based on the free and open RISC-V instruction set architecture.
These newly-launched FPGA chips are available in different configurations, ranging from 15k to 75k look-up tables (LUTs). However, the most significant aspect of these chips is their performance. Internal testing indicates that the Arora V chips are 30 percent faster than the previous-generation Arora GW2A chips while consuming 60 percent less power. GOWIN Semiconductor also emphasizes their resilience, attributing it to a custom static RAM (SRAM) cell design and a Single Event Upset (SEU) handler wrapper to handle errors effectively.
