The RISC-V instruction set architecture (ISA) has played a crucial role in China's IC design development, as the country aims for greater autonomy in the semiconductor industry. The ongoing RISC-V Summit China 2023, held in Beijing from August 23 - 25, has brought together key players in the Chinese semiconductor industry, including T-Head Semiconductor and SiFive. According to Jack Kang, Senior Vice President of SiFive, China is currently the fastest growing market for IC design, with a larger number of designs happening in China compared to other regions.

Krste Asanovic, Chairman of RISC-V International and co-founder of SiFive, predicts that RISC-V cores will reach a shipment volume of at least 80 billion by 2025. At the RISC-V summit, Ho Ning, CTO of Beijing ESWIN Technology, stated that China's shipment volume of RISC-V cores is expected to make up approximately 50% of the global total before 2027. This highlights the rapid growth and adoption of RISC-V in China. In 2022, a significant milestone was achieved when 10 billion RISC-V processors were shipped, which is a remarkable accomplishment considering that it took 30 years for x86 and ARM architectures to reach the same volume.

The concept of "vertical semiconductor," coined by Asanovic, refers to the trend of big tech companies like Apple and Tesla bringing chip designs in-house. Kang believes that RISC-V aligns perfectly with this trend. As an open standard architecture, RISC-V allows multiple engineers to build to that standard, leading to faster growth in software systems. Chinese companies, in particular, are interested in reducing dependency by participating in an open standard system with multiple vendors. Unlike Arm, which has a proprietary ecosystem, RISC-V provides more choices for chipmakers, including the option to use SiFive or its competitors.

Kang stressed the importance of RISC-V in the Chinese automotive sector due to the flexibility it offers. China's rapidly developing electric vehicle ecosystem and the trend towards vehicle electrification have put pressure on Chinese automakers to keep up with global competitors. RISC-V's open standard architecture allows companies in the Chinese auto sector to adapt quickly to technological advancements and changing requirements.

Regarding chiplet technology, which involves integrating different chiplets from various vendors, Kang believes that RISC-V will play a significant role in its development. While the chiplet landscape is currently dominated by a single vendor breaking up designs into chiplets, Kang envisions a future where different chiplets work together like LEGO blocks from various suppliers. RISC-V's role in this context is critical, as the compute component remains the most important aspect of connecting all these systems. Kang predicts that chiplet technology will be implemented sooner in high-end markets such as data centers and automotive applications.

Kang also highlighted the advantages of RISC-V's vector processing, particularly when it comes to edge inference. He discussed the limitations of MCUs in the market, which are optimized for convolutional neural networks (CNNs), while algorithms such as transformers, which are used in applications like ChatGPT, require different hardware. RISC-V's scalable vector architecture fills this gap, acting as a programmable engine for running transformers. However, Kang acknowledges that dedicated hardwired engines still outperform vectors in specific tasks, and envisions a combination of both for efficient pre-processing and post-processing. SiFive provides scalable vector solutions that can be tailored for edge applications or scaled up for data centers, offering flexibility across a range of applications.

SiFive's X280 vector core is optimized for edge inference and designed for applications that require high-throughput, single-thread performance under significant power constraints. The X280 processor was adopted for NASA's next-generation High-Performance Spaceflight Computing (HPSC) processor in 2022, making it part of every future space mission. Its increased compute capabilities enable advanced functions like autonomous capabilities and vision processing in space, with a 100x improvement compared to current space computers.

Kang highlighted NASA's decision to work with SiFive as an example of the long-term growth potential of the RISC-V ecosystem. While RISC-V may currently have lesser ecosystem support compared to established architectures like x86 and ARM, Kang believes that RISC-V is rapidly catching up. Looking ahead, he emphasized that RISC-V is poised to become the leading ecosystem in the next 10 years, with the most programmers working on it.

RISC-V has been vital to China's IC design development as it pursues greater autonomy. Its open standard architecture, flexibility, and scalability make it an attractive choice for Chinese companies in various industries, including automotive and space. The adoption of RISC-V in the Chinese market continues to grow, and it is expected to play a significant role in the future of the semiconductor industry.