The rise of generative artificial intelligence (AIGC) has caused an increase in demand for super chips, resulting in TSMC's advanced packaging production capacity being insufficient. TSMC's President, Wei Zhejia, has stated in a shareholder meeting that the expansion of production needs to happen as soon as possible. Fortunately, TSMC announced the official opening of the Zhunan Advanced Packaging and Testing Plant 6 (AP6) on June 8, 2023, which is their first automated advanced packaging and testing plant that can provide 3D Fabric integration from the front-end to the back-end process and testing services. This has provided much-needed relief to the sudden influx of orders from Nvidia, and has also sent an important message to TSMC's customers that their advanced packaging capacity is safe.

The advanced packaging and testing AP6 factory in Zhunan

To meet the demands of customers and support products such as high-performance computing (HPC), artificial intelligence (AI), and mobile applications, TSMC began construction of the AP6 factory in July 2020. It covers an area of ​​14.3 hectares and has the capacity for 3D Fabric process technology and more than 10 million hours of testing services per year. Dr. He Jun, Deputy General Manager of TSMC Operations/Advanced Packaging Technology and Service, Quality and Reliability, noted that microchip stacking is a key technology to improve chip performance and cost-effectiveness. With strong market demand for three-dimensional integrated circuits (3DIC), TSMC has completed the advanced deployment of advanced packaging and silicon stacking technology capacity.

The advantage of advanced packaging is that it can integrate different functional chips such as memory, logic, and sensing in one chip. This allows customers to mix and match processes, using only the 3/5nm process for important functions, while using mature processes for the rest, improving chip performance and reducing cost. The opening of the Zhunan factory is a milestone for TSMC in the field of advanced packaging. At present, Google's self-developed TPU (tensor processor) and Apple's M2 processor have footprints in advanced packaging.

He Jun emphasized that TSMC is an important long-term trusted partner of customers that provides technological leadership and production capacity to meet their needs. By utilizing the 3D Fabric platform, TSMC can jointly realize technological innovations, becoming an even more powerful force with plans for increasing 3D stacking, integrated fan-out packaging (InFO), CoWoS and advanced testing capacity.

3D fabric refers to TSMC's comprehensive family of 3D silicon stacking and advanced packaging technologies called "3DFabric™". It includes frontend and backend technologies that allow for mini-chips to be stacked together to form a complete system of chips, offering benefits such as faster time-to-market, improved performance and efficiency, smaller form factors, and cost savings. TSMC's 3DFabric includes packaging technologies such as CoWoS and InFO.