Applied Materials, Inc. and Ushio, Inc. have announced a strategic partnership aimed at accelerating the heterogeneous integration (HI) of chiplets into 3D packages. The collaboration entails the introduction of the first digital lithography system tailored for patterning advanced substrates required in the Artificial Intelligence (AI) era of computing.

Digital Lithography Technology
Source: Applied Materials, Inc

Driven by the escalating AI workloads which necessitate larger chips with enhanced functionality, the performance demands of AI are surpassing traditional Moore’s Law scaling. Consequently, chipmakers are increasingly turning to HI techniques, combining multiple chiplets in an advanced package to provide similar or superior performance and bandwidth as a monolithic chip. This shift necessitates larger package substrates based on new materials such as glass, enabling extremely fine-pitch interconnects and superior electrical and mechanical properties.

The strategic partnership between Applied and Ushio collaborates two industry leaders to expedite this transition. Applied's new Digital Lithography Technology (DLT) specifically addresses the advanced substrate roadmaps of their customers. Leveraging their extensive expertise in large substrate processing and a broad portfolio of HI technologies, Applied aims to enable a new generation of innovation in high-performance computing.

Ushio, with over 20 years of experience in building lithography systems for packaging applications, is well-equipped to accelerate the adoption of DLT through a scalable manufacturing ecosystem and robust field-service infrastructure. The partnership aims to broaden their portfolio to provide more solutions to the rapidly evolving challenges in packaging technology.

The new DLT system, the only lithography technology capable of achieving the resolution necessary for advanced substrate applications while delivering the required throughput levels for high-volume production, has already been shipped to multiple customers. It can pattern less than 2-micron line widths, enabling the highest area density for chiplet architectures on any substrate, including wafers or large panels made of glass or organic materials. Additionally, the DLT system is uniquely designed to address unpredictable substrate warpage issues and achieve overlay accuracy.

Looking ahead, Applied will be responsible for the R&D and definition of a scalable roadmap together with Ushio, aimed at continued innovation in advanced packaging to achieve 1-micron line widths and beyond. Ushio, leveraging its mature manufacturing and customer-facing infrastructure, will drive the accelerated adoption of DLT. The partnership offers customers the broadest portfolio of lithography solutions for advanced packaging applications.

The full potential of this collaboration and technology is promising, although it's important to remain informed about the developments, risks, and market dynamics mentioned in the press release.