SiGe:C BiCMOS Technology
IHP Solutions offers industrial customers access to IHP’s powerful SiGe:C BiCMOS technologies, special integrated RF modules and integrated silicon photonics with >60GHz bandwidth photodiodes.
The technologies provide integrated HBTs with cut-off frequencies of up to 500 GHz and are especially well suited for applications in the higher GHz bands for wireless communication or radar applications.
The comprehensive technology offering encompasses:
SiGe:C BiCMOS technologies in 0.25 µm and 0.13 µm.
Backend metal layers:
Number of thin layers: 3 (for 0.25 µm); 5 (for 0.13 µm) thin
Number of thick layers: 2 (TM1: 2 μm, TM2: 3 μm).
IHP Design Kits: Cadence-based for mixed signal, ADS-based for high frequency designs
Comprehensive library of reusable IHP Blocks and IPs for wireless and broadband
Modules
H3P: Additional pnp-HBTs with fT/fmax = 90/120 GHz for complementary bipolar applications
LBE: Localized Backside Etching to remove silicon locally to improve passive performance
PIC: Additional photonic design layers together with BiCMOS BEOL layers on SOI wafers
Scalable production from a few dozens to several thousands of ICs
The technical basis for the production is the state-of-the-art pilot foundry of IHP in a 1,000m^2 Class-1 clean room with a 24 h / 7 days per week mode of operation.
Key characteristics of the plant are:
• Toolset for 0.13 µm technology on 200 mm wafers
• Cycle times down to two days per mask level
• Processing times from tape-in to the shipment of diced chips of about 10 weeks
Please see more details about the technical equipment for processing and inline measurement on IHP's homepage.
Production services are offered in two modes, MPW Runs and Engineering Runs:
MPW Runs (Multi-Project Wafer)
IHP MPW Runs are a very cost efficient means for the production of a very small number of ICs by sharing mask and wafer area with other customers. By default each customer receives 40 ICs per run. Larger amounts are also possible. MPW modes is mostly used in early phases of product development to test and optimize ASIC or structures before finalizing a fully functional ASIC.
Engineering Runs
An Engineering Run is a customer-specific production run and consists of a separate mask set and the delivery of six wafers. The minimum lot size for an Engineering Run is 18 wafers. Some of them will be stopped before BEOL as backup to allow later corrections if necessary via mask-fix (for example). Additional wafers can be purchased upon request.
State-of-the–art measurement and test support
IHP Solutions offers access and professional services to the complete range of measurement and test equipment of a world-leading research institution. Even the most complex and challenging on wafer measurements and testing scenarios are defined and conducted to your specific requirements to ensure that you achieve your innovation goals with your designs. IHP Solutions takes care of test setup and test programm according to your specification.
The equipment allows for:
• Device measurements
• Functional test
• Circuit measurements of Analog Mixed and RF signals
Your ICs – ready for assembly
Together with IHP and other partners IHP Solutions offers to process your ICs to be ready to be used directly in your assembly line.
The services encompass:
• Backside Metalization
• Dicing
• 100% Die Inspection
• Bumping (Solder Bumps, Stud Bumps)
• Flip-Chip or Wire-Bonding
• Fast Prototyping
• Encapsulation (QFN, StratEdge)
• Labeling (laser or printing)
• Testing
• Packaging (e.g. belts, trays)
• Logistics
